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  。Products＞ CPLD experiment platform series＞CPLD Experimental development platform logic(CH-V603)  
       CPLD Experimental development platform logic(CH-V603)  

Product name：CPLD Experimental development platform logic(CH-V603)

Products Category：CPLD experiment platform series
     

     Using USB to download, burn, or Printer download, burn; can be selected for each, hard shell protection,
     user-friendly design, flexible modular structure, the same high school teacher recommended this model.

I、The host system function index:
     1. Host using large FPGA chips, thousands of gate capacity.
     2. Using chip 208 PIN, large-scale FPGA chip.
     3. EEPROM 2M capacity, can store more than a year recording the program, the program automatically 
         after burning.
     4. Experimental platform built-in power supply Input: AC 90 ~ 264V; output power: 20W, power output 
         DV5V2A,± 12V0.5A ISO9001; with RU, CE, SA certification. 
     5. Programmable Frequency Generator (host built-in 12 groups oscillation   frequency, maximum frequency
         100/50/25/10/2/1MHz, 100k/10k/1k/10010/1Hz, according to different needs of the line frequency
         switching to Chip used). 
     6. Frequency Display 1 ~ C a total of 12 switches from the two key switching frequency up and down freely.
     7. The host can receive the program download or burn and can burn different External 5V, 3.3V, 2.5V chip
         indicator may direct volts, and the host built-in LED indicates the internal or external burn download
         function.
     8. Host Support brands are ALTERA, XILINX, ATMEL and other chips can be used.
     9. External burn can be provided with the major manufacturers CPLD to burn.
     10. Can use the GRAPHIC / VHDL ... ... and other programming syntax to design the circuit.
     11. Support WINDOWS 9x/Me/NT/2000/XP operating system.
     12. Host can generate an external output frequency, frequency; 100/50/25/10/2/1MHz,100k/10k/1k/10010/
           1Hz, 12 different frequencies change in the output external use.
     13. The host and the chip to be the power of three different DC5V, DC3.3V, DC2.5V.
     14. Hosts use USB to download, burn function, or Printer download, burn to switch to use separately.

 
II、The host hardware specifications:
     1.8 × 8 two-color dot matrix display.
     2.20 LED lights.
     3.20 × 2 character LCD liquid crystal display modules (with backlight).
     4.6-digit seven-byte display.
     5.8 yuan analog to digital (A / D) IC.
     6.2 Group 8-bit digital to analog (D / A) IC.
     7.DC DC motor rated voltage DV3.6 ~ 5V), rated speed 4400 (rpm) Rated power 0.0000819(kW),
        rated current variation 0.021 (A), Han Guang governor control the speed of speed training.
     8.4-phase five-wire stepper motor STEP ANGLE 7.5 °, PULL-IN RATE450MinPPS control orientation
        angle attachment.
     9.24 Input DIP switch.
     10.4 × 4 scan (mechanical) keyboard.
     11.4 yuan reversion Quasi-bit input and reset the configuration by building key (RESET).
     12. Experimental platform built-in speaker 1 W 4 ohm speakers.
     13. Transmission Interface: Printer Port Interface and the USB interface can be used to download
           programming.
     14. These functional specifications necessary to use an integrated test platform and raise the chip pin.

 
     
     
   
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